SEALSQ Presented at Tech&Fest How the Quantum Shield QS7001 Can be Integrated as a Hardware Root of Trust to Meet Cryptographic Transition New Legal Requirements Like CNSA 2.0
Geneva, Switzerland, Feb. 11, 2026 (GLOBE NEWSWIRE) --
SEALSQ Presented at Tech&Fest How the Quantum Shield QS7001 Can be Integrated as a Hardware Root of Trust to Meet Cryptographic Transition New Legal Requirements Like CNSA 2.0
The quantum resistant chip can be embedded inside robots, autonomous systems, automotive ECUs, industrial controllers, IoT edge nodes, and other intelligent devices to comply with emerging post-quantum mandates and regulation, like CNSA 2.0 or CRA.
SEALSQ Corp (NASDAQ:LAES) ("SEALSQ" or "Company"), a company that focuses on developing and selling Semiconductors, PKI, and Post-Quantum technology hardware and software products, has been showcasing last week its quantum resistant chip, at Tech&Fest, a prominent deep-tech fair at the heart of the European and French research and technology ecosystem in Grenoble.
The QS7001 is a quantum-resistant secure microcontroller (SoC) built around a 32-bit RISC-V core tightly coupled with a dedicated cryptographic acceleration subsystem. Unlike software-based PQC implementations running on general-purpose MCUs, the QS7001 implements SHA 3 lattice-based post-quantum primitive directly in silicon, significantly reducing cycle count, memory footprint, and power consumption while mitigating timing and side-channel leakage risks.
At the core of its CNSA 2.0 compliance is native hardware support for:
- ML-DSA-87 (Dilithium 5) for firmware and software signing, as required under CNSA 2.0 for high-security environments
- ML-KEM (Kyber) for quantum-resistant key establishment
- SHA-3 hardware hashing engines
- AES-256 symmetric encryption
- True Random Number Generator (TRNG)
Hardware & ROM based PQC Acceleration
Beyond SHA 3 hardware acceleration, The QS7001 integrates at ROM level a dedicated lattice-math accelerator optimized for:
- Number Theoretic Transform (NTT) operations
- Polynomial multiplication over module lattices
- Rejection sampling and modular reduction
- Constant-time arithmetic to mitigate timing attacks
By implementing these computationally intensive lattice operations in hardware, the device achieves up to 10x performance improvement versus software-only PQC stacks running on conventional microcontrollers.
Most importantly, Hardware acceleration also reduces RAM usage, enabling full ML-DSA-87 execution within embedded constraints typical of robotics controllers and automotive ECUs.
The chip includes 512 KB embedded FLASH and secure SRAM partitions, supporting
- Secure key storage
- Firmware image storage
- Encrypted bootloaders
- Trusted execution environments
Secure Boot and Firmware Signing (CNSA 2.0 Alignment)
CNSA 2.0 mandates ML-DSA-87 (Dilithium 5) for firmware and software signing in National Security Systems and high-assurance environments. The QS7001 ML-DSA-87 implementation is protected against side channel attacks and fault injections. The chip also features Anti-rollback firmware protection and cryptographically enforced firmware authenticity and integrity.
Hybrid and Migration Support
CNSA 2.0 defines a transition path from classical public-key cryptography to post-quantum algorithms. The QS7001 supports hybrid cryptographic modes, enabling:
- Parallel support for ECC/RSA and ML-DSA
- Hybrid key establishment combining ECDH and ML-KEM
- Configurable cryptographic policies for phased migration
This ensures backward compatibility with existing infrastructure while enabling forward compliance with NSA timelines.
Tamper Resistance and Physical Security
The QS7001 is engineered for Common Criteria EAL5+ and FIPS certification pathways and integrates:
- Active tamper detection sensors
- Voltage, frequency, and glitch monitoring
- Secure key zeroization on tamper events
- Side-channel hardened cryptographic engines
- Memory protection units (MPU)
These protections are essential for robotics, defense systems, autonomous vehicles, and critical infrastructure where physical exposure cannot be ruled out.
Application Integration in Intelligent Systems
Within robotics and intelligent devices, the QS7001 functions as:
- A secure element for identity provisioning
- A hardware trust anchor for AI model integrity
- A secure communication co-processor
- A TPM-like security controller in embedded architectures
It ensures that:
- Robot firmware updates are quantum-safe
- AI models deployed at the edge cannot be altered
- Device-to-device authentication is resistant to quantum adversaries
- Telemetry and control channels are encrypted using CNSA 2.0-aligned primitives
CNSA 2.0 is critical because it mandates the transition from classical cryptography (RSA and ECC) to quantum-resistant algorithms to protect national security systems against future quantum-computing threats. It addresses the "harvest now, decrypt later" risk, where adversaries can capture encrypted data today and decrypt it once quantum computers become powerful enough.
A key requirement is the use of ML-DSA-87 (Dilithium 5) for firmware and software signing, ensuring that secure boot and system integrity remain protected in a post-quantum world. It also mandates ML-KEM (Kyber) for quantum-safe key exchange, safeguarding encrypted communications and device authentication.
CNSA 2.0 is not just a cryptographic update — it is a strategic shift that forces governments, defense contractors, and technology providers to redesign hardware, firmware, and infrastructure with long-term quantum resilience built in.
The moment is critical to accelerate the migration to Post-Quantum Cryptography (PQC). As quantum technologies rapidly advance, governments are moving decisively to secure strategic leadership.
About SEALSQ:
SEALSQ is a leading innovator in Post-Quantum Technology hardware and software solutions. Our technology seamlessly integrates Semiconductors, PKI (Public Key Infrastructure), and Provisioning Services, with a strategic emphasis on developing state-of-the-art Quantum Resistant Cryptography and Semiconductors designed to address the urgent security challenges posed by quantum computing. As quantum computers advance, traditional cryptographic methods like RSA and Elliptic Curve Cryptography (ECC) are increasingly vulnerable.
SEALSQ is pioneering the development of Post-Quantum Semiconductors that provide robust, future-proof protection for sensitive data across a wide range of applications, including Multi-Factor Authentication tokens, Smart Energy, Medical and Healthcare Systems, Defense, IT Network Infrastructure, Automotive, and Industrial Automation and Control Systems. By embedding Post-Quantum Cryptography into our semiconductor solutions, SEALSQ ensures that organizations stay protected against quantum threats. Our products are engineered to safeguard critical systems, enhancing resilience and security across diverse industries.
For more information on our Post-Quantum Semiconductors and security solutions, please visit www.sealsq.com.
Forward-Looking Statements
This communication expressly or implicitly contains certain forward-looking statements concerning SEALSQ Corp and its businesses. Forward-looking statements include statements regarding our business strategy, financial performance, results of operations, market data, events or developments that we expect or anticipate will occur in the future, as well as any other statements which are not historical facts. Although we believe that the expectations reflected in such forward-looking statements are reasonable, no assurance can be given that such expectations will prove to have been correct. These statements involve known and unknown risks and are based upon a number of assumptions and estimates which are inherently subject to significant uncertainties and contingencies, many of which are beyond our control. Actual results may differ materially from those expressed or implied by such forward-looking statements. Important factors that, in our view, could cause actual results to differ materially from those discussed in the forward-looking statements include SEALSQ's ability to continue beneficial transactions with material parties, including a limited number of significant customers; market demand and semiconductor industry conditions; and the risks discussed in SEALSQ's filings with the SEC. Risks and uncertainties are further described in reports filed by SEALSQ with the SEC.
SEALSQ Corp is providing this communication as of this date and does not undertake to update any forward-looking statements contained herein as a result of new information, future events or otherwise.
| SEALSQ Corp. Carlos Moreira Chairman & CEO Tel: +41 22 594 3000 [email protected] | SEALSQ Investor Relations (US) The Equity Group Inc. Lena Cati Tel: +1 212 836-9611 [email protected] |
